vdp registers

Page 1/2
| 2

By poke-1,170

Paragon (1768)

poke-1,170's picture

03-11-2008, 14:08

Is there a list somewhere of the vdp registers on the msx2, and their functions ?

Login or register to post comments

By Hrothgar

Champion (479)

Hrothgar's picture

03-11-2008, 14:49

By poke-1,170

Paragon (1768)

poke-1,170's picture

03-11-2008, 16:23

thanks Smile

By NYYRIKKI

Enlighted (5918)

NYYRIKKI's picture

03-11-2008, 16:40

http://fms.komkon.org/MSX/Docs/V9958.txt

... just forget registers 25-27

By poke-1,170

Paragon (1768)

poke-1,170's picture

03-11-2008, 17:54

media4.dropshots.com/photos/152250/20081103/180916.jpg
I gave some random value to vdp (9), which resulted the picture being scaled
down twice, what could have caused that ? I saw one specific bit handles
the transparancy on/off, but hmmm, how can this happen ? any idea which
bit would cause this ?

By NYYRIKKI

Enlighted (5918)

NYYRIKKI's picture

03-11-2008, 18:44

This is caused by incorrect values in bits 2 & 3

By poke-1,170

Paragon (1768)

poke-1,170's picture

03-11-2008, 20:07

heh. rather jolly side effect Smile so both those bits need to be set as 1 ?

By NYYRIKKI

Enlighted (5918)

NYYRIKKI's picture

03-11-2008, 22:03

I have no idea and I'm too lazy to search the NMS 8280 hardware details, but as you have the hardware I'm sure you can figure that out pretty fast... It leaves only 4 possibilitys...

By aoineko

Champion (440)

aoineko's picture

22-05-2022, 21:08

(I hope I won't be blamed for recycling this thread)

I have questions about some bits of the VDP registers (MSX1/2).
I have read several times the technical documentation of both TMS9918 and V9958, and the MRC wiki, but the information I found doesn't answer all my questions (this would also be an opportunity to improve the wiki because if I didn't find/understand the info, I'm probably not the only one).

R#0 – b#0 (EV) (external VDP input)
What is it used for? (this bit is not documented in V9938 programmers guide)

R#0 – b#6 (DG) (digitize mode)
I'm not sure I understand how this works. It allows to fill the VRAM with info that comes from an input other than the CPU? In what form is the information sent? Is the digitization done in the VDP or does it receive already digitized data?

R#1 – b#7 (4/16K) (selects VRAM configuration)
I read that it is only for MSX1, but I didn't understand how this flag works. Is it a "hard" configuration that represents the VRAM layout or is it an option that can be changed? And if so, what is its effect?

R#8 – b#3 (VR) (type of vram)
Same question.

R#8 – b#1 (BW) (grayscale display)
Do we agree that this flag does not work at all? If not, what are the requirements to make it work?

R#8 – b#4 (CB) (color bus direction)
What is it used for? Not sure what the color bus is and why we could want to change its direction.

R#8 – b#5 (TP) (color 0 setting)
The description of this flag suggests that it only affects MSX with a video input, but if I understand correctly it affects all MSX (2/2+) for the display of color 0 (index color 0 of the palette when TP == 0 and backdrop color when TP == 1). Is this correct?

R#8 – b#7 (MS) (mouse setting)
How does it work in practice? I don't see the connection between the mouse and the VDP color bus. ^^

R#9 – b#0 (DC) (dot clock)
What is it used for?

R#9 – b#2 (EO) (even/odd screens)
If we set register R#13 to 0, it will automatically change the displayed page at each vblank? Is this a viable solution for double-buffering? I noticed that it is possible to know if it is the even or odd frame that is currently displayed using the EO flag of the S#2 status register.

R#9 – b#3 (IL) (interlace)
EO flag must be set to be able to use IL? Documentation is not clear about this point.

By gdx

Enlighted (5473)

gdx's picture

23-05-2022, 02:20

aoineko wrote:

R#0 – b#0 (EV) (external VDP input)
What is it used for? (this bit is not documented in V9938 programmers guide)

This is only used on the MSXs with an external video input.

aoineko wrote:

R#0 – b#6 (DG) (digitize mode)
I'm not sure I understand how this works. It allows to fill the VRAM with info that comes from an input other than the CPU? In what form is the information sent? Is the digitization done in the VDP or does it receive already digitized data?

Set the color bus as input to read data from a digitizer. I think the data is sent to VRAM automatically by the hardware.

aoineko wrote:

R#1 – b#7 (4/16K) (selects VRAM configuration)
I read that it is only for MSX1, but I didn't understand how this flag works. Is it a "hard" configuration that represents the VRAM layout or is it an option that can be changed? And if so, what is its effect?

MSX1s use 16kB of VRAM. So set it otherwise the VDP will do anything. It is ignorer by the v99x8.

aoineko wrote:

R#8 – b#3 (VR) (type of vram)

The VRAM can be chips with its memory configured on 65,536 x 1 bit or 65,536 x 4 bits. So you should not change this bit.

aoineko wrote:

R#8 – b#4 (CB) (color bus direction)
What is it used for? Not sure what the color bus is and why we could want to change its direction.

Probably same as R#0 – b#6 (DG) but for MSX2 modes.

aoineko wrote:

R#8 – b#5 (TP) (color 0 setting)
The description of this flag suggests that it only affects MSX with a video input

If no video input the color 0 is black when this bit is 0 because no signal.

aoineko wrote:

R#8 – b#7 (MS) (mouse setting)
How does it work in practice?

It requires hardware to be usable.

aoineko wrote:

R#9 – b#0 (DC) (dot clock)
What is it used for?

Used on MSX with video input.

aoineko wrote:

If we set register R#13 to 0, it will automatically change the displayed page at each vblank?

It depends on the screen mode used. In graphical mode, yes.

aoineko wrote:

R#9 – b#3 (IL) (interlace)
EO flag must be set to be able to use IL? Documentation is not clear about this point.

I do not think so.

By Grauw

Ascended (10577)

Grauw's picture

23-05-2022, 02:56

aoineko wrote:

R#9 – b#2 (EO) (even/odd screens)
If we set register R#13 to 0, it will automatically change the displayed page at each vblank? Is this a viable solution for double-buffering? I noticed that it is possible to know if it is the even or odd frame that is currently displayed using the EO flag of the S#2 status register.

You could but I don't think it's practical, since you have no control over the page it shows. If a frame takes too long it will do the switch whether you're ready for it or not. Manually switching pages on the VBlank ISR is more convenient and flexible.

aoineko wrote:

R#9 – b#3 (IL) (interlace)
EO flag must be set to be able to use IL? Documentation is not clear about this point.

If you don't set EO the IL mode will just display the same page on both interlace fields, so it's not very useful without EO.

Page 1/2
| 2